PhD
Registered PhD Guides
| Sr.No. | Name of Guide | Area of Research | Registered Scholars |
| 1 | Dr. P.K. Dakhole | VLSI | 2 |
| 2 | Dr. U.S. Ghodeswar | VLSI | 0 |
| 3 | Dr. P.P. Palsodkar | VLSI | 0 |
| 4 | Dr. D.B. Bhoyar | VLSI | 3 |
Registered PhD Scholars
| Sr.No. | Scholar Name | Guide Name/Co-Guide Name | Area of Research | PhD Registered Title | Registration Date | Status |
| 1 | Mr. Kuldeep Pande | Dr. P.T. Karule | VLSI Design | Design of Floating Point Arithmetic Compuational Units for Non Linear Applications | 19-Mar-2022 | Ongoing |
| 2 | Mrs. Sujata Chiwande | Dr. P.K. Dakhole | VLSI Design | Design of Reversible Logic Circuits for Optimized Power and Speed Applicaton | 21-Mar-2022 |
PhD Awarded
| Sr.No. | Scholar Name | Guide Name/Co-Guide Name | Area of Research | Title | Registration Date | Date of Notification |
| 1 | Mrs.P.P. Palsodkar | Dr. P.K. Dakhole | VLSI Design | Study and optimization of high-speed ADC`s | 11-Apr-2012 | 1-Oct-16 |
| 2 | Manisha Waje | Dr. P.K. Dakhole | VLSI Design | Novel approach to design QCA logic circuit using reversible logic | 11-Apr-2012 | 13-Nov-18 |
| 3 | Manisha Khorgade | Dr. P.K. Dakhole | VLSI Design | Analysis of Various Scalable and Reconfigurable Processor Architectures and its Application | 11-Apr-2012 | 13-Nov-18 |
| 4 | Ms. Vaishali Raut | Dr. P.K. Dakhole | VLSI Design | Approaches for the implementation of multi valued logic with hybrid single electronic transistor and CMOS Technology | 11-Apr-2012 | 13-Nov-18 |
| 5 | Shweta P. Hazare (Gaidhane) | Dr. P.K. Dakhole | VLSI Design | Comparative Study of Multiple Valued Logic & Implementations Of various Quaternary logical arithmetic system for performance optimization | 11-Apr-2012 | 20-Feb-19 |
| 6 | Ms. Monika Mankar (kalbande) | Dr. G.M. Asutkar | VLSI Design | Analysis, design & VLSI Implementation of Advanced Error Correction Codes | 13-Jul-2012 | 20-Feb-19 |
| 7 | Ms. Deepti Borkute | Dr. P.K. Dakhole | VLSI Design | Performance Improvement of Memory Structures Using Quaternary LUT for high Speed, Low power Application | 11-Apr-2012 | 21-Sept-19 |
| 8 | Ms. Ankita Tijare | Dr. P.K. Dakhole | VLSI Design | Parametric Classification of VLSI Analog Multipliers and Application Specific Performance Optimization | 13-Jan-2014 | 25-Aug-21 |